JR Alberda
11-24-2003, 05:27 PM
Source: Slashdot (http://slashdot.org/articles/03/11/24/2211259.shtml?tid=118&tid=187)
Ridgelift writes "In keeping with Moore's Law, Intel will being mass-producing chips using 65-nanometer process technology in 2005, according to a ZDNet article (additional coverage at EE Times and The Inquirer). Intel recently produced a Static Random Access Memory (SRAM) cell at 0.57 square microns, in comparison to 90-nanometer process measuring 1 square micron. "You can get a 40 to 50 percent increase in clock speed with no further improvements" says Intel director Mark Bohr."
I sure hope that MS has a trick up thier sleeve with IBM for the XB2 chip. Intel is looking really good for 2005.
Ridgelift writes "In keeping with Moore's Law, Intel will being mass-producing chips using 65-nanometer process technology in 2005, according to a ZDNet article (additional coverage at EE Times and The Inquirer). Intel recently produced a Static Random Access Memory (SRAM) cell at 0.57 square microns, in comparison to 90-nanometer process measuring 1 square micron. "You can get a 40 to 50 percent increase in clock speed with no further improvements" says Intel director Mark Bohr."
I sure hope that MS has a trick up thier sleeve with IBM for the XB2 chip. Intel is looking really good for 2005.